Renesas Electronics /R7FA2A1AB /SYSTEM /SCKDIVCR

Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text

Interpret as SCKDIVCR

31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (others)PCKD0Reserved0 (others)PCKB0Reserved0 (000)ICK0 (others)FCK0Reserved

FCK=others, PCKD=others, ICK=000, PCKB=others

Description

System Clock Division Control Register

Fields

PCKD

Peripheral Module Clock D (PCLKD) Select

0 (000): /1

0 (others): Setting prohibited

1 (001): /2

2 (010): /4

3 (011): /8

4 (100): /16

5 (101): /32

6 (110): /64

Reserved

These bits are read as 00000. The write value should be 00000.

PCKB

Peripheral Module Clock B (PCLKB) Select

0 (000): /1

0 (others): Setting prohibited

1 (001): /2

2 (010): /4

3 (011): /8

4 (100): /16

5 (101): /32

6 (110): /64

Reserved

These bits are read as 0000000000000. The write value should be 0000000000000.

ICK

System Clock (ICLK) Select

0 (others): Setting prohibited

0 (000): /1

1 (001): /2

2 (010): /4

3 (011): /8

4 (100): /16

5 (101): /32

6 (110): /64

FCK

Flash IF Clock (FCLK) Select

0 (000): /1

0 (others): Setting prohibited

1 (001): /2

2 (010): /4

3 (011): /8

4 (100): /16

5 (101): /32

6 (110): /64

Reserved

This bit is read as 0. The write value should be 0.

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